Computer Architecture
Group A
Introduction to basic structure and operational concepts, instruction formats, instruction
execution process, addressing modes, stacks and subroutine handling, instruction sets and
organisational features of some representative machines.
Control unit: Hardware control unit design, microprogramming and micro programmed
control unit design, micro sequencer and bit sliced microprocessor (AMD 2900) based micro
program control unit design, horizontal and vertical microprogramming, nanoprogramming,
emulation.
Main memory organisation: Memory hierarchy, virtual memory, cache memory,
interleaved memory and linear addressing techniques.
I/O organisation: Addressing of I/O devices, memory mapped I/O and I/O mapped I/O, data
transfer techniques-programmed, interrupt driven, DMA, I/O channels programming, data
transfer over synchronous and asynchronous buses, some standard. interface bus like
VME/IEEE-488.
Group B
Introduction to RISC and CISC architecture and their comparison.
Pipelining: Classification, scalar and vector pipelining, instruction pipelining and execution
pipelining, control strategy for pipeline scheduling and performance analysis.
Associative memory and its implementation with example algorithms to run on associative
memory machines.
Flynn's classification of multiprocessor machines, SISD, SIMD, MIMD (both, loosely
coupled and tightly coupled).
Introduction to some interconnection network (mesh, cube, cycle, hypercubes, pyramid and
omega).
Pipelining: Classification, scalar and vector pipelining, instruction pipelining and execution
pipelining, control strategy for pipeline scheduling and performance analysis.
Associative memory and its implementation with example algorithms to run on associative
memory machines.
Flynn's classification of multiprocessor machines, SISD, SIMD, MIMD (both, loosely
coupled and tightly coupled).
Introduction to some interconnection network (mesh, cube, cycle, hypercubes, pyramid and
omega).